1. Field of the Invention
This invention relates to the field of general purpose microcomputers and particularly to a microcomputer unit configured such that a plurality thereof can be sequentially coupled together to form a chain of signal processing units each including a local processor and an associated multiport RAM that can be shared between a neighboring "upstream" unit's processor and its own local processor. The chain of such processors can be initialized by a host computer that downloads code that is sequentially transferred from unit to unit and used to perform processing of orthogonal channel data that may be uniquely related to each unit but relationally associated with at least some of the other units.
2. Description of the Prior Art
There are important computational problems that involve multiple (n) processes and approximate a "chain" of linked processes, with mostly "nearest neighbor" dependencies. Examples of such are DNA and Protein Models and polymer analysis. While these processes can be modeled on a single processor, the computational load tends to grow as n.sup.2.
It would be useful to have an architecture that could more expeditiously deal with this type of issue. Such architecture would have additional usefulness in exercising economic models, stock market models, ecology models, digital circuit simulation, neural networks, image encoding, encryption, Markov processes, weather models, tree searches (such as gene sequences, finger prints, etc.), and models particular to other fields of application, some of which may find special purposes for orthogonal channels.
The utility of such architecture can be demonstrated in terms of linear polymer chains. However, the choice of such problem is not meant to imply any limitation or inapplicability of a particular type of processor to other "many body" problems, including artificial many body topics such as finite element analysis, in which one body is treated as many segments.
For example, digital gate simulation problems grow as the number of gates on a single chip grows. According to Electronic Engineering Times, Apr. 14, 1997, p. 18: "The largest system the DOD is targeting involves 9000 (Intel) Pentium Pros. Their goal is to handle a billion gate design". Because the architecture implemented in such processing devices as the Intel 8051 should be one to two orders of magnitude less expensive than Pentium based multi-processors, it is expected that such systems might have application here.
According to "Molecular Modeling" in Science, Vol 273, 6 Sep. 1996: "Most of the familiar depictions of DNA winding through space, and proteins and enzymes coming together, are created by means of x-ray crystallography. . . . it can take years before a researcher gets hold of the roughly "ten thousand numbers" that describe the shape of a protein molecule. These would be x, y, and z coordinates for a typical protein, which may contain 3000 atoms."
These years of work, if successful, culminate in "an electron density map of the molecule in question: a cube of numbers, often 64.times.64.times.64 with the numbers ranging from say, 0 to 100. This map can be imagined as a cloud in space with clumps where the big numbers are. That's where the electrons are, and by extension, the atoms."
The question of whether these years of work can be replaced by modeling is still unanswered, as indicated in Science Vol 274, 29 Nov. 1996, wherein the question is proffered: ". . . can researchers who model protein structure make accurate predictions before a structure is determined by experiment?"
Prior art generally falls into two categories. The first category includes general purpose processors, which are employed in large numbers to solve particular problems. The 9000 Pentium Pro system from Intel illustrates an example of such systems although it has yet not been built.
The primary problem with arrays of general purpose processors is cost. The Department of Defense can afford 9000 Pentium Pros, but few others can.
The other category consists of very simple processors, many of which may be implemented on a single substrate, and which are often optimized for special applications.
The primary problem with arrays of special purpose (or single-substrate)processors is difficulty of programming and inflexibility. These solutions also tend to be expensive, due to the very limited market for them. Results have been disappointing for prior art of this type, both commercially, and in terms of problem solving. Integrated arrays of extremely simple boolean operators--while lightning fast, are hard to program, that is, it is hard to map real world phenomena into simple boolean arrays.
An intermediate approach was taken by Inmos, in their "Transputer". A somewhat general, but proprietary instruction set, was coupled with high speed serial channels, to provide powerful multi-processor arrays. These suffered from difficulty of programming, although Inmos did provide a high level language called Occam. Most commercial Transputer implementations have been limited to four processors per board, with board prices in the thousands of dollars.
The evolution of single chip computers offers the ability to economically apply large numbers of processors to this problem, however the typical micro controller has not been designed with this problem in mind, and the noted lack of success in the commercial market has tended to suppress activity in this field. Yet the need for protein, DNA, and similar calculations has grown enormously. At the same time line widths have shrunk die sizes significantly, decreasing the inherent cost of the devices.